SDAccel Design Contest @ NECST
SDAccel Design Contest
Contest description
Data center operators constantly seek more server performance. Currently they develop applications with easy-to-program multicore CPUs and GPUs but CPU performance/watt is hitting the wall and GPU performance/watt is hitting the wall as well. Designers working on high-volume data-center applications want GPU ease-of-programming but with hardware that will give them low power consumption, high throughput, and the lowest possible latency. However, there’s a significant problem with scalability of multicore-CPU and GPU accelerators: developers would like to target simple full height plug-in PCIe boards to use as application accelerators in data center servers.
FPGAs provide the heart of what’s needed for power-efficient hardware application acceleration on one chip while providing solutions that are below the 25W per board targets. The SDAccel development environment for OpenCL, C, and C++, enables up to 25X better performance/watt for data center application acceleration leveraging FPGAs. SDAccel, member of the SDx family, combines the industry's first architecturally optimising compiler supporting any combination of OpenCL, C, and C++ kernels, along with libraries, development boards and the first complete CPU/GPU like development and run-time experience for FPGAs.
At NECSTLab we are organising the first SDAccel Design Contest, which will take place during the second semester. During this period of time, participants will have the chance to attend some special tutoring sessions on SDAccel.
The design contest will open on the 22nd of February and will close on the 11th of March. Each project / entry for the contest has to be realized by a team of up to two participants.
Classes Timetable:
| Date | Time | Room (@ Politecnico) | Topic |
| 11st of January | 4pm - 8pm | Seminar Room @ Building 20, DEIB | Vivado and Vivado HLS |
| 18th of January | 4pm - 8pm | Seminar Room @ Building 20, DEIB | Vivado and Vivado HLS |
| 25th of January | 4pm - 8pm | Seminar Room @ Building 20, DEIB | Vivado and Vivado HLS |
| 1st of February | 4pm - 8pm | Seminar Room @ Building 20, DEIB | SDAccel |
| 8th of February | 4pm - 8pm | Seminar Room @ Building 20, DEIB | SDAccel |
| 15th of February | 4pm - 8pm | Seminar Room @ Building 20, DEIB | SDAccel |
| 22nd of February | 4pm - 8pm | Seminar Room @ Building 20, DEIB | SDAccel |
Awards
The winning team of the contest will be selected for joining the NECSTLab delegation to attend the NECST Group Conference in San Francisco (22nd of May - 3rd of June 2018).